Last September, Jensen Huang did something that would have been unthinkable a few years earlier: he put $5 billion of NVIDIA's money into Intel, and then went on a joint call with Intel chairman Lip-Bu Tan to explain why. The reason he gave was not factories, not process nodes, not geopolitics. It was packaging. "Intel has the Foveros multi-technology packaging capability," Huang said, "and it's really enabling here."
This week the story moved again. A report from Korea's GF Securities, picked up across Taiwanese and Korean media, says NVIDIA is evaluating Intel's Foveros for part of its back-end AI chip production — with analyst Jeff Pu pointing to a window around late 2028, when Intel's 14A process is scheduled to hit volume manufacturing. Nothing is signed. But nobody in the industry is laughing at the idea anymore, and that alone is worth pausing on.
Because if the most valuable chip company on earth is seriously considering having its fiercest old rival handle the most delicate step of its manufacturing, the question isn't really about Intel or NVIDIA. It's about what has become scarce.
Packaging used to be the boring part. AI changed that.
For half a century, the precious resource in semiconductors was the front end — the fab, the node, the shrinking transistor. What happened after the wafer came out of the fab was an afterthought: slice it, mount it, wire it, ship it. Assembly houses competed for that work on fractions of a penny.
Look inside a modern AI accelerator and that world is gone. The thing NVIDIA sells for tens of thousands of dollars is not a chip. It is a chassis of chips — compute dies, towers of high-bandwidth memory, I/O — fused together on a silicon interposer through TSMC's CoWoS packaging. The performance customers pay for is created in that package as much as in any transistor. And so, predictably, that is where the queue now forms. Through 2025 and into this year, CoWoS capacity has been persistently booked out by NVIDIA, AMD, and Google, with smaller ASIC designers complaining they can't get a slot at any price. The optical networking industry is warning about capacity sold out into 2029. The bottleneck didn't disappear; it migrated downstream.
This is the opening Intel has been quietly building toward while everyone watched its front-end struggles. Its EMIB technology links chiplets through small silicon bridges buried in the substrate — no giant interposer required. Foveros goes a step further and stacks dies vertically, connecting them with through-silicon vias, which shortens the wiring and improves power efficiency. Crucially, neither technology obliges a customer to fab anything at Intel. You can have TSMC manufacture your logic on its most advanced node and still hand the finished dies to Intel for stacking. That modular arrangement is exactly what GF Securities is describing: NVIDIA's GPU cores would keep coming from TSMC, while Intel takes a slice of the 3D work.
And NVIDIA wouldn't be first through the door. Google is reportedly already an EMIB-T customer. Apple and Qualcomm have been posting job listings for engineers with EMIB and Foveros experience — the kind of tell that recruiting departments give away before strategy departments announce anything. Intel, for its part, has put roughly $7 billion into a packaging complex in Malaysia and started EMIB assembly at Amkor's site in South Korea to handle overflow. This is what an industry quietly building a second source looks like.
A cheat sheet, because the acronyms won't get simpler
| Technology | Owner | How it works | Where it stands |
|---|---|---|---|
| CoWoS | TSMC | Dies side-by-side on a large silicon interposer | The incumbent; sold out to the AI giants |
| EMIB / EMIB-T | Intel | Small silicon bridges embedded in the substrate | Shipping; Google reportedly on board; capacity growing in Malaysia and Korea |
| Foveros Direct | Intel | True 3D stacking with through-silicon vias | Ramps with Intel's 14A era around 2028; NVIDIA reportedly evaluating |
The encouraging read for buyers is that TSMC's packaging monopoly finally has a challenger with real capacity to sell, and competition in the back end should eventually loosen the bottleneck. But "eventually" is doing heavy lifting in that sentence — the relief is measured in years, and the transition itself will be messy before it is smooth.
Why you should care even if you never buy an AI chip
It's tempting to file all of this under "hyperscaler problems." Resist that temptation. The back-end squeeze reaches much further down the supply chain than the headline suggests.
Start with capacity math. When the AI giants book out advanced packaging years ahead, the pressure doesn't stay inside CoWoS lines. It spills into substrates, interposers, and OSAT assembly-and-test capacity generally — including the mature packaging lines that your microcontrollers, power devices, and analog parts depend on. Buyers who already watch wafer pricing as an early-warning indicator should add packaging-house utilization to the same dashboard.
Then notice what NVIDIA is actually doing here, underneath the drama. It's second-sourcing. The same discipline a procurement team applies to a single-source connector, executed at the foundry level by the most sophisticated buyer of manufacturing capacity on the planet. Expect more of this everywhere: dual-track supply chains, deliberately split between technologies and geographies. The companies building those tracks now will be the ones still shipping when some site, process, or trade lane stumbles later.
There's also a quieter consequence that will matter in five years. As the industry moves from monolithic chips to chiplet packages, the bill of materials hiding inside a single "component" multiplies. A discontinued package variant can strand an otherwise perfectly available die, and vice versa. Anyone who manages lifecycle risk — and if you've been through an EOL notice on a long-lifecycle product, you know the pain — will need to track not just part numbers but the packaging technology behind them. The map of critical capacity is being redrawn around a handful of places — Taiwan, Malaysia, New Mexico, South Korea — and where your parts are packaged is becoming nearly as important as where they're fabbed.
None of this means you should change a purchase order this week because of an analyst note. NVIDIA has confirmed the investment and the admiration; it has confirmed no packaging orders. What the GF Securities report gives you is not a fait accompli but a weather report: the center of gravity in this industry is sliding from the front of the fab to the back of it, and the smart money — literally, $5 billion of it — has already moved.
The companies that read weather reports early get to plan their routes. Everyone else finds out about the bottleneck from their next quote.
If your lead times are already stretching and you'd like a second set of eyes on a hard-to-find or allocated part, that's the work we do every day at RISEIC — sourcing through vetted channels, with every lot physically verified in our Hong Kong lab before it ships. Send over your RFQ; you'll have an answer within 24 hours.